Description: Please refer to the section BELOW (and NOT ABOVE) this line for the product details - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Title:Writing Testbenches: Functional Verification Of Hdl ModelsISBN13:9781475783445ISBN10:1475783442Author:Bergeron, Janick (Author)Description:Chapter 6 Architecting Testbenches 221 Reusable Verification Components 221 Procedural Interface 225 Development Process 226 Verilog Implementation 227 Packaging Bus-Functional Models 228 Utility Packages 231 Vhdl Implementation 237 Packaging Bus-Functional Procedures 238 240 Creating A Test Harness 243 Abstracting The Clientserver Protocol Managing Control Signals 246 Multiple Server Instances 247 Utility Packages 249 Autonomous Generation And Monitoring 250 Autonomous Stimulus 250 Random Stimulus 253 Injecting Errors 255 Autonomous Monitoring 255 258 Autonomous Error Detection Input And Output Paths 258 Programmable Testbenches 259 Configuration Files 260 Concurrent Simulations 261 Compile-Time Configuration 262 Verifying Configurable Designs 263 Configurable Testbenches 265 Top Level Generics And Parameters 266 Summary 268 Chapter 7 Simulation Management 269 Behavioral Models 269 Behavioral Versus Synthesizable Models 270 Example Of Behavioral Modeling 271 Characteristics Of A Behavioral Model 273 X Writing Testbenches: Functional Verification Of Hdl Models Modeling Reset 276 Writing Good Behavioral Models 281 Behavioral Models Are Faster 285 The Cost Of Behavioral Models 286 The Benefits Of Behavioral Models 286 Demonstrating Equivalence 289 Pass Or Fail? 289 Managing Simulations 292 294 Configuration Management Verilog Configuration Management 295 Vhdl Configuration Management 301 Sdf Back-Annotation 305 Output File Management 309 Regression 312 Running Regressions 313 Regression Management 314 Summary 316 Appendix A Coding Guidelines 317 Directory Structure 318 Vhdl Specific 320 Verilog Specific 320 General Coding Guidelines 321 Comments 321 Layout 323 Syntax 326 Debugging 329 Naming Guidelines 329 Capitalization 330 Identifiers 332 Constants 334 334 Hdl Specific Filenames 336 Hdl Coding Guidelines 336 337 Structure 337 Layout Binding:Paperback, PaperbackPublisher:SPRINGER NATUREPublication Date:2013-04-14Weight:1.17 lbsDimensions:0.78'' H x 9.21'' L x 6.14'' WNumber of Pages:354Language:English
Price: 112.12 USD
Location: USA
End Time: 2024-12-03T12:52:31.000Z
Shipping Cost: 0 USD
Product Images
Item Specifics
Return shipping will be paid by: Buyer
All returns accepted: Returns Accepted
Item must be returned within: 30 Days
Refund will be given as: Money Back
Return policy details:
Book Title: Writing Testbenches: Functional Verification Of Hdl Models
Item Length: 9.3in
Item Height: 0.3in
Item Width: 6.1in
Author: Janick Bergeron
Publication Name: Writing Testbenches : Functional Verification of Hdl Models
Format: Trade Paperback
Language: English
Publisher: Springer
Publication Year: 2013
Type: Textbook
Item Weight: 20.5 Oz
Number of Pages: Xxii, 354 Pages